power control register
| LPSDSR | Low-power deepsleep/Sleep/Low-power run |
| PDDS | Power down deepsleep |
| CWUF | Clear wakeup flag |
| CSBF | Clear standby flag |
| PVDE | Power voltage detector enable |
| PLS | PVD level selection |
| DBP | Disable backup domain write protection |
| ULP | Ultra-low-power mode |
| FWU | Fast wakeup |
| VOS | Voltage scaling range selection |
| DS_EE_KOFF | Deep sleep mode with Flash memory kept off |
| LPRUN | Low power run mode |
| LPDS | Regulator in Low-power deepsleep mode This bit allows switching the regulator to low-power mode when the CPU enters Stop mode. Its behavior depends on LPSDSR bit |