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stm32 /stm32l1 /STM32L100 /RI /ASCR2

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Interpret as ASCR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (GR10_1)GR10_1 0 (GR10_2)GR10_2 0 (GR10_3)GR10_3 0 (GR10_4)GR10_4 0 (GR6_1)GR6_1 0 (GR6_2)GR6_2 0 (GR5_1)GR5_1 0 (GR5_2)GR5_2 0 (GR5_3)GR5_3 0 (GR4_1)GR4_1 0 (GR4_2)GR4_2 0 (GR4_3)GR4_3 0 (GR3_3)GR3_3 0 (GR3_4)GR3_4 0 (GR3_5)GR3_5 0 (GR9_3)GR9_3 0 (GR9_4)GR9_4 0 (GR2_3)GR2_3 0 (GR2_4)GR2_4 0 (GR2_5)GR2_5 0 (GR7_5)GR7_5 0 (GR7_6)GR7_6 0 (GR7_7)GR7_7 0 (GR6_3)GR6_3 0 (GR6_4)GR6_4 0 (GR5_4)GR5_4

Description

RI analog switches control register 2

Fields

GR10_1

GR10_1 analog switch control
GR10_2

GR10_2 analog switch control
GR10_3

GR10_3 analog switch control
GR10_4

GR10_4 analog switch control
GR6_1

GR6_1 analog switch control
GR6_2

GR6_2 analog switch control
GR5_1

GR5_1 analog switch control
GR5_2

GR5_2 analog switch control
GR5_3

GR5_3 analog switch control
GR4_1

GR4_1 analog switch control
GR4_2

GR4_2 analog switch control
GR4_3

GR4_3 analog switch control
GR3_3

GR3_3 analog switch control
GR3_4

GR3_4 analog switch control
GR3_5

GR3_5 analog switch control
GR9_3

GR9_3 analog switch control
GR9_4

GR9_4 analog switch control
GR2_3

GR2_3 analog switch control
GR2_4

GR2_4 analog switch control
GR2_5

GR2_5 analog switch control
GR7_5

GR7_5 analog switch control
GR7_6

GR7_6 analog switch control
GR7_7

GR7_7 analog switch control
GR6_3

GR6_3 analog switch control
GR6_4

GR6_4 analog switch control
GR5_4

GR5_4 analog switch control

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32