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stm32 /stm32l1 /STM32L151 /ADC /CSR

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Interpret as CSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (AWD1)AWD1 0 (EOC1)EOC1 0 (JEOC1)JEOC1 0 (JSTRT1)JSTRT1 0 (STRT1)STRT1 0 (OVR1)OVR1 0 (ADONS1)ADONS1

Description

ADC common status register

Fields

AWD1

Analog watchdog flag of the ADC
EOC1

End of conversion of the ADC
JEOC1

Injected channel end of conversion of the ADC
JSTRT1

Injected channel Start flag of the ADC
STRT1

Regular channel Start flag of the ADC
OVR1

Overrun flag of the ADC
ADONS1

ADON Status of ADC1

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32