Regviz

stm32 /stm32l1 /STM32L151 /TIM10 /OR

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Interpret as OR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TI1_RMP 0 (ETR_RMP)ETR_RMP 0 (TI1_RMP_RI)TI1_RMP_RI

Description

option register

Fields

TI1_RMP

Timer 10 input 1 remap
ETR_RMP

Timer10 ETR remap
TI1_RMP_RI

Timer10 Input 1 remap for Routing Interface (RI)

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32