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stm32 /stm32l4+ /STM32L4P5 /RTC /ICSR

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Interpret as ICSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (WUTWF)WUTWF 0 (SHPF)SHPF 0 (INITS)INITS 0 (RSF)RSF 0 (INITF)INITF 0 (INIT)INIT 0BIN0BCDU0 (RECALPF)RECALPF

Description

initialization control and status register

Fields

WUTWF

Wakeup timer write flag
SHPF

Shift operation pending
INITS

Initialization status flag
RSF

Registers synchronization flag
INITF

Initialization flag
INIT

Initialization mode
BIN

Binary mode
BCDU

BCD update
RECALPF

Recalibration pending Flag

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32