Regviz

stm32 /stm32l4+ /STM32L4S9 /TIM7 /TIM7_ARR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TIM7_ARR

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https://regviz.com/r/stm32/stm32l4+/STM32L4S9/TIM7/TIM7_ARR#0x0

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ARR

Description

TIM7 auto-reload register

Fields

ARR

Prescaler value

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32