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stm32 /stm32l4 /STM32L476 /RCC /APB2RSTR

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Interpret as APB2RSTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SYSCFGRST)SYSCFGRST 0 (SDMMCRST)SDMMCRST 0 (TIM1RST)TIM1RST 0 (SPI1RST)SPI1RST 0 (TIM8RST)TIM8RST 0 (USART1RST)USART1RST 0 (TIM15RST)TIM15RST 0 (TIM16RST)TIM16RST 0 (TIM17RST)TIM17RST 0 (SAI1RST)SAI1RST 0 (SAI2RST)SAI2RST 0 (DFSDMRST)DFSDMRST

Description

APB2 peripheral reset register

Fields

SYSCFGRST

System configuration (SYSCFG) reset
SDMMCRST

SDMMC reset
TIM1RST

TIM1 timer reset
SPI1RST

SPI1 reset
TIM8RST

TIM8 timer reset
USART1RST

USART1 reset
TIM15RST

TIM15 timer reset
TIM16RST

TIM16 timer reset
TIM17RST

TIM17 timer reset
SAI1RST

Serial audio interface 1 (SAI1) reset
SAI2RST

Serial audio interface 2 (SAI2) reset
DFSDMRST

Digital filters for sigma-delata modulators (DFSDM) reset

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32