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stm32 /stm32l5 /STM32L552 /GTZC_TZSC /TZSC_PRIVCFGR2

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Interpret as TZSC_PRIVCFGR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TIM8PRIV)TIM8PRIV 0 (USART1PRIV)USART1PRIV 0 (TIM15PRIV)TIM15PRIV 0 (TIM16PRIV)TIM16PRIV 0 (TIM17PRIV)TIM17PRIV 0 (SAI1PRIV)SAI1PRIV 0 (SAI2PRIV)SAI2PRIV 0 (DFSDM1PRIV)DFSDM1PRIV 0 (CRCPRIV)CRCPRIV 0 (TSCPRIV)TSCPRIV 0 (ICACHEPRIV)ICACHEPRIV 0 (ADCPRIV)ADCPRIV 0 (AESPRIV)AESPRIV 0 (HASHPRIV)HASHPRIV 0 (RNGPRIV)RNGPRIV 0 (PKAPRIV)PKAPRIV 0 (SDMMC1PRIV)SDMMC1PRIV 0 (FSMC_REGPRIV)FSMC_REGPRIV 0 (OCTOSPI1_REGPRIV)OCTOSPI1_REGPRIV

Description

TZSC privilege configuration register 2

Fields

TIM8PRIV

TIM8PRIV
USART1PRIV

USART1PRIV
TIM15PRIV

TIM15PRIV
TIM16PRIV

TIM16PRIV
TIM17PRIV

TIM17PRIV
SAI1PRIV

SAI1PRIV
SAI2PRIV

SAI2PRIV
DFSDM1PRIV

DFSDM1PRIV
CRCPRIV

CRCPRIV
TSCPRIV

TSCPRIV
ICACHEPRIV

ICACHEPRIV
ADCPRIV

ADCPRIV
AESPRIV

AESPRIV
HASHPRIV

HASHPRIV
RNGPRIV

RNGPRIV
PKAPRIV

PKAPRIV
SDMMC1PRIV

SDMMC1PRIV
FSMC_REGPRIV

FSMC_REGPRIV
OCTOSPI1_REGPRIV

OCTOSPI1_REGRIV

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32