Regviz

stm32 /stm32l5 /STM32L552 /OCTOSPI1 /WTCR

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Interpret as WTCR

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https://regviz.com/r/stm32/stm32l5/STM32L552/OCTOSPI1/WTCR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DCYC

Description

WTCR

Fields

DCYC

DCYC

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32