Regviz

stm32 /stm32l5 /STM32L552 /TAMP /SR

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Interpret as SR

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https://regviz.com/r/stm32/stm32l5/STM32L552/TAMP/SR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TAMP1F)TAMP1F 0 (TAMP2F)TAMP2F 0 (TAMP3F)TAMP3F 0 (TAMP4F)TAMP4F 0 (TAMP5F)TAMP5F 0 (TAMP6F)TAMP6F 0 (TAMP7F)TAMP7F 0 (TAMP8F)TAMP8F 0 (ITAMP1F)ITAMP1F 0 (ITAMP2F)ITAMP2F 0 (ITAMP3F)ITAMP3F 0 (ITAMP5F)ITAMP5F 0 (ITAMP8F)ITAMP8F

Description

TAMP status register

Fields

TAMP1F

TAMP1F
TAMP2F

TAMP2F
TAMP3F

TAMP3F
TAMP4F

TAMP4F
TAMP5F

TAMP5F
TAMP6F

TAMP6F
TAMP7F

TAMP7F
TAMP8F

TAMP8F
ITAMP1F

ITAMP1F
ITAMP2F

ITAMP2F
ITAMP3F

ITAMP3F
ITAMP5F

ITAMP5F
ITAMP8F

ITAMP8F

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32