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stm32 /stm32n6 /STM32N645 /CSI /CSI_PCR

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Interpret as CSI_PCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)PWRDOWN 0 (B_0x0)CLEN 0 (B_0x0)DL0EN 0 (B_0x0)DL1EN

PWRDOWN=B_0x0, DL0EN=B_0x0, CLEN=B_0x0, DL1EN=B_0x0

Description

CSI-2 Host DPHY_RX control register

Fields

PWRDOWN

Power down

0 (B_0x0): Active state

1 (B_0x1): Power down the D-PHY_RX
CLEN

Clock lane enable

0 (B_0x0): Clock lanes disabled

1 (B_0x1): Clock lanes enabled
DL0EN

D-PHY_RX data lane 0 enable

0 (B_0x0): Data lane 0 module is in shutdown mode.

1 (B_0x1): Enable the data lane 0 module.
DL1EN

D-PHY_RX data lane 1 enable

0 (B_0x0): Data lane 1 module is in shutdown mode.

1 (B_0x1): Enable the data lane 1 module.

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32