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stm32 /stm32n6 /STM32N645 /CSI /CSI_PRCR

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Interpret as CSI_PRCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)PEN

PEN=B_0x0

Description

CSI PHY reset control register

Fields

PEN

When set to 0, this bit places the digital section of the D-PHY in the reset state.

0 (B_0x0): PHY is disabled (in reset state).

1 (B_0x1): PHY is enabled (out of reset state).

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32