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stm32 /stm32n6 /STM32N645 /CSI /CSI_PTCR1

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Interpret as CSI_PTCR1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TDI0 (B_0x0)TWM

TWM=B_0x0

Description

CSI PHY test control register 1

Fields

TDI

Test-interface data in
TWM

Test-interface write mode selector

0 (B_0x0): Data write operation is set on the rising edge of the testclk signal.

1 (B_0x1): Address write operation is set on the falling edge of the testclk signal.

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32