stm32 /stm32n6 /STM32N645 /DCMIPP /DCMIPP_P0PPCR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as DCMIPP_P0PPCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)SWAPYUV 0 (B_0x0)PAD 0 (B_0x0)HEADEREN 0 (B_0x0)BSM0 (B_0x0)OEBS 0 (B_0x0)LSM 0 (B_0x0)OELS 0 (B_0x0)LINEMULT 0 (B_0x0)DBM

LINEMULT=B_0x0, LSM=B_0x0, HEADEREN=B_0x0, SWAPYUV=B_0x0, DBM=B_0x0, OEBS=B_0x0, BSM=B_0x0, PAD=B_0x0, OELS=B_0x0

Description

DCMIPP Pipe0 pixel packer configuration register

Fields

SWAPYUV

Swaps, within a 32-bit word, byte 0-vs-1 and byte 2-vs-3. It corresponds, for YUV422 pixels formats, to swap between UYVY and YUYV.

0 (B_0x0): Outputs the provided words, as described in Section 34.10: Pixel format description.

1 (B_0x1): Swaps the bytes from provided words, byte 0-vs.-1 and 2-vs.-3

PAD

Pad mode for monochrome and raw Bayer 10/12/14 bpp: MSB vs. LSB alignment.

0 (B_0x0): Aligns on LSB (and pads null bits on MSB), for backward compatibility with former DCMI.

1 (B_0x1): Aligns on MSB (and pads null bits on LSB), for better ease of software or GPU.

HEADEREN

CSI header dump enable

0 (B_0x0): CSI-2 headers are not dumped

1 (B_0x1): CSI-2 headers are dumped as a 32-bit word.

BSM

Byte select mode

0 (B_0x0): Interface captures all received data

1 (B_0x1): Interface captures 1 data out of 2

2 (B_0x2): Interface captures one byte out of four

3 (B_0x3): Interface captures two bytes out of four

OEBS

Odd/even byte select (byte select start)

0 (B_0x0): Interface captures the first data (byte or double byte) from the frame/line start, the second one is dropped

1 (B_0x1): Interface captures the second data (byte or double byte) from the frame/line start, the first one is dropped

LSM

Line select mode

0 (B_0x0): Interface captures all received lines

1 (B_0x1): Interface captures one line out of two

OELS

Odd/even line select (line select start)

0 (B_0x0): Interface captures first line after the frame start, second one is dropped

1 (B_0x1): Interface captures second line from the frame start, first one is dropped

LINEMULT

Amount of capture completed lines for LINE event and interrupt

0 (B_0x0): Event after one line

1 (B_0x1): Event after two lines

2 (B_0x2): Event after four lines

3 (B_0x3): Event after eight lines

4 (B_0x4): Event after sixteen lines

5 (B_0x5): Event after 32 lines

6 (B_0x6): Event after 64 lines

7 (B_0x7): Event after 128 lines

DBM

Double buffer mode

0 (B_0x0): No double buffer mode activated. Pipe0 always dumps to memory address set by DCMIPP_P0PPM0AR1.

1 (B_0x1): Double buffer mode activated. Dump address location switches from DCMIPP_P0PPM0AR1 to DCMIPP_P0PPM0AR2 alternatively on each frame.

Links

()