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stm32 /stm32n6 /STM32N645 /DCMIPP /DCMIPP_P1CBLCCR

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Interpret as DCMIPP_P1CBLCCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)ENABLE 0BLCB0BLCG0BLCR

ENABLE=B_0x0

Description

DCMIPP Pipe1 current black level calibration control register

Fields

ENABLE

For current black level calibration

0 (B_0x0): Bypass: black level calibration is not active, all pixels are transmitted non-modified.

1 (B_0x1): Enable: the BLCR, G, B are subtracted.
BLCB

Current black level calibration - Blue
BLCG

Current black level calibration - Green
BLCR

Current black level calibration - Red

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32