Regviz

stm32 /stm32n6 /STM32N645 /DCMIPP /DCMIPP_P1CRI5CR1

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Interpret as DCMIPP_P1CRI5CR1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0HSTART0CLB0CLG0VSTART0CLR

Description

DCMIPP Pipe1 current ROI5 configuration register 1

Fields

HSTART

Current horizontal start, from 0 to 4094 pixels wide
CLB

Current color line blue
CLG

Current color line green
VSTART

Current vertical start, from 0 to 4094 pixels high
CLR

Current color line red

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32