stm32 /stm32n6 /STM32N645 /DCMIPP /DCMIPP_P1ST1CR

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Interpret as DCMIPP_P1ST1CR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)ENABLE 0 (B_0x0)BINS 0SRC0 (B_0x0)MODE

BINS=B_0x0, MODE=B_0x0, ENABLE=B_0x0

Description

DCMIPP Pipe1 statistics1 control register

Fields

ENABLE

None

0 (B_0x0): Disabled: statistics are not accumulated.

1 (B_0x1): Enable: statistics are accumulated

BINS

Current bin definition

0 (B_0x0): All Pixels: Accu is incremented of Component, if 0 less than or equal Component less than 256.

1 (B_0x1): NoExt16: Accu is incremented of Component, if 16 less than or equal Component less than 240

SRC

Statistics source

MODE

Statistics mode

0 (B_0x0): Average: accumulates the 8-bit component value of the considered pixel components.

1 (B_0x1): Bins: accumulates 256 for each considered pixel component fitting a bin dynamic.

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