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stm32 /stm32n6 /STM32N645 /ETH /ETH_DMATBSCTRL0R

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Interpret as ETH_DMATBSCTRL0R

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)FTOV 0FGOS0FTOS

FTOV=B_0x0

Description

DMA TBS control register 0

Fields

FTOV

Fetch time offset valid

0 (B_0x0): Fetch time offset invalid

1 (B_0x1): Fetch time offset valid
FGOS

Fetch GSN offset
FTOS

Fetch time offset

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32