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stm32 /stm32n6 /STM32N645 /ETH /ETH_MACA3HR

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Interpret as ETH_MACA3HR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ADDRHI0 (B_0x0)DCS 0MBC0 (B_0x0)SA 0 (AE)AE

DCS=B_0x0, SA=B_0x0

Description

MAC Address 3 high register

Fields

ADDRHI

MAC Address1 [47:32]
DCS

DMA Channel Select

0 (B_0x0): DMA Rx channel 0

1 (B_0x1): DMA Rx channel 1
MBC

Mask Byte Control
SA

Source Address

0 (B_0x0): DA

1 (B_0x1): SA
AE

Address Enable

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32