stm32 /stm32n6 /STM32N645 /ETH /ETH_MACHWF0R

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as ETH_MACHWF0R

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (MIISEL)MIISEL 0 (GMIISEL)GMIISEL 0 (HDSEL)HDSEL 0 (PCSSEL)PCSSEL 0 (VLHASH)VLHASH 0 (SMASEL)SMASEL 0 (RWKSEL)RWKSEL 0 (MGKSEL)MGKSEL 0 (MMCSEL)MMCSEL 0 (ARPOFFSEL)ARPOFFSEL 0 (TSSEL)TSSEL 0 (EEESEL)EEESEL 0 (TXCOESEL)TXCOESEL 0 (RXCOESEL)RXCOESEL 0ADDMACADRSEL 0 (MACADR32SEL)MACADR32SEL 0 (MACADR64SEL)MACADR64SEL 0TSSTSSEL 0 (SAVLANINS)SAVLANINS 0 (B_0x0)ACTPHYSEL

ACTPHYSEL=B_0x0

Description

HW feature 0 register

Fields

MIISEL

10 or 100 Mbps Support

GMIISEL

1000 Mbps Support

HDSEL

Half-duplex Support

PCSSEL

PCS Registers (TBI, SGMII, or RTBI PHY interface)

VLHASH

VLAN Hash Filter Selected

SMASEL

SMA (MDIO) Interface

RWKSEL

PMT Remote wake-up Packet Enable

MGKSEL

PMT Magic Packet Enable

MMCSEL

RMON Module Enable

ARPOFFSEL

ARP Offload Enabled

TSSEL

IEEE 1588-2008 Timestamp Enabled

EEESEL

Energy Efficient Ethernet Enabled

TXCOESEL

Transmit Checksum Offload Enabled

RXCOESEL

Receive Checksum Offload Enabled

ADDMACADRSEL

MAC Addresses 1-31 Selected

MACADR32SEL

MAC Addresses 32-63 Selected

MACADR64SEL

MAC Addresses 64-127 Selected

TSSTSSEL

Timestamp System Time Source

1 (B_0x1): Internal

2 (B_0x2): External

3 (B_0x3): Both

SAVLANINS

Source Address or VLAN Insertion Enable

ACTPHYSEL

Active PHY Selected

0 (B_0x0): GMII or MII

1 (B_0x1): RGMII

2 (B_0x2): SGMII

3 (B_0x3): TBI

4 (B_0x4): RMII

5 (B_0x5): RTBI

6 (B_0x6): SMII

Links

()