Regviz

stm32 /stm32n6 /STM32N645 /ETH /ETH_MMC_FPE_TX_IMR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as ETH_MMC_FPE_TX_IMR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32n6/STM32N645/ETH/ETH_MMC_FPE_TX_IMR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (FCIM)FCIM 0 (HRCIM)HRCIM

Description

MMC FPE Tx interrupt mask register

Fields

FCIM

MMC Transmit Fragment Counter Interrupt Mask
HRCIM

MMC Transmit Hold Request Counter Interrupt Mask

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32