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stm32 /stm32n6 /STM32N645 /ETH /ETH_MMC_TX_INTERRUPT_MASK

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Interpret as ETH_MMC_TX_INTERRUPT_MASK

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TXSCOLGPIM)TXSCOLGPIM 0 (TXMCOLGPIM)TXMCOLGPIM 0 (TXGPKTIM)TXGPKTIM 0 (TXLPIUSCIM)TXLPIUSCIM 0 (TXLPITRCIM)TXLPITRCIM

Description

MMC Tx interrupt mask register

Fields

TXSCOLGPIM

MMC Transmit Single Collision Good Packet Counter Interrupt Mask
TXMCOLGPIM

MMC Transmit Multiple Collision Good Packet Counter Interrupt Mask
TXGPKTIM

MMC Transmit Good Packet Counter Interrupt Mask
TXLPIUSCIM

MMC Transmit LPI microsecond counter interrupt Mask
TXLPITRCIM

MMC Transmit LPI transition counter interrupt Mask

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32