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stm32 /stm32n6 /STM32N645 /EXTI /EXTI_EXTICR1

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Interpret as EXTI_EXTICR1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x00)EXTI00 (B_0x00)EXTI10 (B_0x00)EXTI20 (B_0x00)EXTI3

EXTI0=B_0x00, EXTI3=B_0x00, EXTI1=B_0x00, EXTI2=B_0x00

Description

EXTI external interrupt selection register 1

Fields

EXTI0

EXTI0 GPIO port selection.

0 (B_0x00): PA0 pin

1 (B_0x01): PB0 pin

2 (B_0x02): PC0 pin

3 (B_0x03): PD0 pin

4 (B_0x04): PE0 pin

5 (B_0x05): PF0 pin

6 (B_0x06): PG0 pin

7 (B_0x07): PH0 pin

8 (B_0x08): PN0 pin

9 (B_0x09): PO0 pin

10 (B_0x0A): PP0 pin

11 (B_0x0B): PQ0 pin
EXTI1

EXTI1 GPIO port selection

0 (B_0x00): PA1 pin

1 (B_0x01): PB1 pin

2 (B_0x02): PC1 pin

3 (B_0x03): PD1 pin

4 (B_0x04): PE1 pin

5 (B_0x05): PF1 pin

6 (B_0x06): PG1 pin

7 (B_0x07): PH1 pin

8 (B_0x08): PN1 pin

9 (B_0x09): PO1 pin

10 (B_0x0A): PP1 pin

11 (B_0x0B): PQ1 pin
EXTI2

EXTI2 GPIO port selection

0 (B_0x00): PA2 pin

1 (B_0x01): PB2 pin

2 (B_0x02): PC2 pin

3 (B_0x03): PD2 pin

4 (B_0x04): PE2 pin

5 (B_0x05): PF2 pin

6 (B_0x06): PG2 pin

7 (B_0x07): PH2 pin

8 (B_0x08): PN2 pin

9 (B_0x09): PO2 pin

10 (B_0x0A): PP2 pin

11 (B_0x0B): PQ2 pin
EXTI3

EXTI3 GPIO port selection

0 (B_0x00): PA3 pin

1 (B_0x01): PB3 pin

2 (B_0x02): PC3 pin

3 (B_0x03): PD3 pin

4 (B_0x04): PE3 pin

5 (B_0x05): PF3 pin

6 (B_0x06): PG3 pin

7 (B_0x07): PH3 pin

8 (B_0x08): PN3 pin

9 (B_0x09): PO3 pin

10 (B_0x0A): PP3 pin

11 (B_0x0B): PQ3 pin

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32