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stm32 /stm32n6 /STM32N645 /FDCAN1 /FDCAN_CCU_IE

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Interpret as FDCAN_CCU_IE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)CWEE 0 (B_0x0)CSCE

CSCE=B_0x0, CWEE=B_0x0

Description

FDCAN RAM watchdog register

Fields

CWEE

Calibration watchdog event enable

0 (B_0x0): Interrupt disabled

1 (B_0x1): Interrupt enabled
CSCE

Calibration state changed enable

0 (B_0x0): Interrupt disabled

1 (B_0x1): Interrupt enabled

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32