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stm32 /stm32n6 /STM32N645 /FMC1 /FMC_ICR

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Interpret as FMC_ICR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)CIREF 0 (B_0x0)CIHLF 0 (B_0x0)CIFEF

CIREF=B_0x0, CIHLF=B_0x0, CIFEF=B_0x0

Description

FMC NAND controller interrupt clear register

Fields

CIREF

Clear Interrupt rising edge flag

0 (B_0x0): No effect

1 (B_0x1): Clear the IREF flag in the FMC_ISR register
CIHLF

Clear Interrupt high-level flag

0 (B_0x0): No effect

1 (B_0x1): Clears the IHLF flag in the FMC_ISR register
CIFEF

Clear Interrupt falling edge flag

0 (B_0x0): No effect

1 (B_0x1): Clears the IFEF flag in the FMC_ISR register

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32