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stm32 /stm32n6 /STM32N645 /GFXTIM /GFXTIM_EVCR

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Interpret as GFXTIM_EVCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)EV1EN 0 (B_0x0)EV2EN 0 (B_0x0)EV3EN 0 (B_0x0)EV4EN

EV4EN=B_0x0, EV3EN=B_0x0, EV1EN=B_0x0, EV2EN=B_0x0

Description

GFXTIM events control register

Fields

EV1EN

event 1 enable

0 (B_0x0): event 1 generation disabled

1 (B_0x1): event 1 generation enabled
EV2EN

event 2 enable

0 (B_0x0): event 2 generation disabled

1 (B_0x1): event 2 generation enabled
EV3EN

event 3 enable

0 (B_0x0): event 3 generation disabled

1 (B_0x1): event 3 generation enabled
EV4EN

event 4 enable

0 (B_0x0): event 4 generation disabled

1 (B_0x1): event 4 generation enabled

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32