stm32 /stm32n6 /STM32N645 /GPDMA /GPDMA_C14BR1

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Interpret as GPDMA_C14BR1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0BNDT0BRC0 (B_0x0)SDEC 0 (B_0x0)DDEC 0 (B_0x0)BRSDEC 0 (B_0x0)BRDDEC

DDEC=B_0x0, BRSDEC=B_0x0, SDEC=B_0x0, BRDDEC=B_0x0

Description

GPDMA channel 14 alternate block register 1

Fields

BNDT

block number of data bytes to transfer from the source

BRC

Block repeat counter

SDEC

source address decrement

0 (B_0x0): At the end of a programmed burst transfer from the source, the GPDMA_CxSAR register is updated by adding the programmed offset GPDMA_CxTR3.SAO to the current GPDMA_CxSAR value (current source address)

1 (B_0x1): At the end of a programmed burst transfer from the source, the GPDMA_CxSAR register is updated by subtracting the programmed offset GPDMA_CxTR3.SAO to the current GPDMA_CxSAR value (current source address)

DDEC

destination address decrement

0 (B_0x0): At the end of a programmed burst transfer to the destination, the GPDMA_CxDAR register is updated by adding the programmed offset GPDMA_CxTR3.DAO to the current GPDMA_CxDAR value (current destination address)

1 (B_0x1): At the end of a programmed burst transfer to the destination, the GPDMA_CxDAR register is updated by subtracting the programmed offset GPDMA_CxTR3.DAO to the current GPDMA_CxDAR value (current destination address)

BRSDEC

Block repeat source address decrement

0 (B_0x0): at the end of a block transfer, the GPDMA_CxSAR register is updated by adding the programmed offset GPDMA_CxBR2.BRSAO to the current GPDMA_CxSAR value (current source address)

1 (B_0x1): at the end of a block transfer, the GPDMA_CxSAR register is updated by subtracting the programmed offset GPDMA_CxBR2.BRSAO from the current GPDMA_CxSAR value (current source address)

BRDDEC

Block repeat destination address decrement

0 (B_0x0): at the end of a block transfer, the GPDMA_CxDAR register is updated by adding the programmed offset GPDMA_CxBR2.BRDAO to the current GPDMA_CxDAR value (current destination address)

1 (B_0x1): at the end of a block transfer, the GPDMA_CxDAR register is updated by subtracting the programmed offset GPDMA_CxBR2.BRDAO from the current GPDMA_CxDAR value (current destination address)

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