EN=B_0x0, LSM=B_0x0, TCIE=B_0x0, LAP=B_0x0, USEIE=B_0x0, SUSP=B_0x0, ULEIE=B_0x0, DTEIE=B_0x0, HTIE=B_0x0, TOIE=B_0x0, SUSPIE=B_0x0, PRIO=B_0x0, RESET=B_0x0
GPDMA channel 1 control register
| EN | enable 0 (B_0x0): write: ignored, read: channel disabled 1 (B_0x1): write: enable channel, read: channel enabled |
| RESET | reset 0 (B_0x0): no channel reset 1 (B_0x1): channel reset |
| SUSP | suspend 0 (B_0x0): write: resume channel, read: channel not suspended 1 (B_0x1): write: suspend channel, read: channel suspended. |
| TCIE | transfer complete interrupt enable 0 (B_0x0): interrupt disabled 1 (B_0x1): interrupt enabled |
| HTIE | half transfer complete interrupt enable 0 (B_0x0): interrupt disabled 1 (B_0x1): interrupt enabled |
| DTEIE | data transfer error interrupt enable 0 (B_0x0): interrupt disabled 1 (B_0x1): interrupt enabled |
| ULEIE | update link transfer error interrupt enable 0 (B_0x0): interrupt disabled 1 (B_0x1): interrupt enabled |
| USEIE | user setting error interrupt enable 0 (B_0x0): interrupt disabled 1 (B_0x1): interrupt enabled |
| SUSPIE | completed suspension interrupt enable 0 (B_0x0): interrupt disabled 1 (B_0x1): interrupt enabled |
| TOIE | trigger overrun interrupt enable 0 (B_0x0): interrupt disabled 1 (B_0x1): interrupt enabled |
| LSM | Link step mode 0 (B_0x0): channel executed for the full linked-list and completed at the end of the last LLI (GPDMA_CxLLR = 0). The 16 low-significant bits of the link address are null (LA[15:0] = 0) and all the update bits are null (UT1 = UB1 = UT2 = USA = UDA = ULL = 0 and 1 (B_0x1): channel executed once for the current LLI |
| LAP | linked-list allocated port 0 (B_0x0): port 0 (AHB) allocated 1 (B_0x1): port 1 (AHB) allocated |
| PRIO | priority level of the channel x GPDMA transfer versus others 0 (B_0x0): low priority, low weight 1 (B_0x1): low priority, mid weight 2 (B_0x2): low priority, high weight 3 (B_0x3): high priority |