I3C timing register 1
| AVAL | Number of kernel clock cycles to set a time unit of 1 s, whatever I3C acts as controller or target. |
| ASNCR | Activity state of the new controller (when I3C acts as active controller) |
| FREE | Number of kernel clocks cycles that is used to set some MIPI timings like bus free condition time (when the I3C acts as controller) |
| SDA_HD | SDA hold time (when the I3C acts as controller), in number of kernel clocks cycles (refer to MIPI timing SDA hold time in push-pull t less than sub>HD_PP less than /sub>): |