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stm32 /stm32n6 /STM32N645 /IWDG /IWDG_SR

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Interpret as IWDG_SR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PVU)PVU 0 (RVU)RVU 0 (WVU)WVU 0 (EWU)EWU 0 (B_0x0)ONF 0 (EWIF)EWIF

ONF=B_0x0

Description

IWDG status register

Fields

PVU

Watchdog prescaler value update
RVU

Watchdog counter reload value update
WVU

Watchdog counter window value update
EWU

Watchdog interrupt comparator value update
ONF

Watchdog enable status bit

0 (B_0x0): The IWDG is not activated

1 (B_0x1): The IWDG is activated and needs to be refreshed regularly by the application
EWIF

Watchdog early interrupt flag

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32