MDF_DLY1CR

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Interpret as MDF_DLY1CR

SKPBF=B_0x0, SKPDLY=B_0x0

MDF delay control register 1

SKPDLY	Delay to apply to a bitstream 0 (B_0x0): No input sample skipped 1 (B_0x1): 1 input sample skipped
SKPBF	Skip busy flag 0 (B_0x0): MDF ready to accept a new value into SKPDLY[6:0] 1 (B_0x1): Last valid SKPDLY[6:0] still under processing

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