stm32 /stm32n6 /STM32N645 /OTG1 /OTG_GLPMCFG

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as OTG_GLPMCFG

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)LPMEN 0 (B_0x0)LPMACK 0 (B_0x0)BESL0 (REMWAKE)REMWAKE 0 (L1SSEN)L1SSEN 0 (B_0x0)BESLTHRS 0 (L1DSEN)L1DSEN 0 (B_0x0)LPMRSP 0 (B_0x0)SLPSTS 0 (B_0x0)L1RSMOK 0LPMCHIDX 0LPMRCNT 0 (SNDLPM)SNDLPM 0LPMRCNTSTS 0 (B_0x0)ENBESL

ENBESL=B_0x0, LPMRSP=B_0x0, LPMEN=B_0x0, SLPSTS=B_0x0, BESL=B_0x0, LPMACK=B_0x0, BESLTHRS=B_0x0, L1RSMOK=B_0x0

Description

OTG core LPM configuration register

Fields

LPMEN

LPM support enable

0 (B_0x0): LPM capability is not enabled

1 (B_0x1): LPM capability is enabled

LPMACK

LPM token acknowledge enable

0 (B_0x0): NYET

1 (B_0x1): ACK

BESL

Best effort service latency

0 (B_0x0): 125

1 (B_0x1): 150

2 (B_0x2): 200

3 (B_0x3): 300

4 (B_0x4): 400

5 (B_0x5): 500

6 (B_0x6): 1000

7 (B_0x7): 2000

8 (B_0x8): 3000

9 (B_0x9): 4000

10 (B_0xA): 5000

11 (B_0xB): 6000

12 (B_0xC): 7000

13 (B_0xD): 8000

14 (B_0xE): 9000

15 (B_0xF): 10000

REMWAKE

bRemoteWake value

L1SSEN

L1 Shallow Sleep enable

BESLTHRS

BESL threshold

0 (B_0x0): 75

1 (B_0x1): 100

2 (B_0x2): 150

3 (B_0x3): 250

4 (B_0x4): 350

5 (B_0x5): 450

6 (B_0x6): 950

L1DSEN

L1 deep sleep enable

LPMRSP

LPM response

0 (B_0x0): ERROR (No handshake response)

1 (B_0x1): STALL

2 (B_0x2): NYET

3 (B_0x3): ACK

SLPSTS

Port sleep status

0 (B_0x0): Core not in L1

1 (B_0x1): Core in L1

L1RSMOK

Sleep state resume OK

0 (B_0x0): The application or host cannot start resume from Sleep state

1 (B_0x1): The application or host can start resume from Sleep state

LPMCHIDX

LPM Channel Index

LPMRCNT

LPM retry count

SNDLPM

Send LPM transaction

LPMRCNTSTS

LPM retry count status

ENBESL

Enable best effort service latency

0 (B_0x0): The core works as described in the following document:

1 (B_0x1): The core works as described in the LPM Errata:

Links

()