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stm32 /stm32n6 /STM32N645 /OTG1 /OTG_GRXSTSR

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Interpret as OTG_GRXSTSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0EPNUM0BCNT0 (B_0x0)DPID 0PKTSTS0FRMNUM0 (STSPHST)STSPHST

DPID=B_0x0

Description

OTG receive status debug read register [alternate]

Fields

EPNUM

Endpoint number
BCNT

Byte count
DPID

Data PID

0 (B_0x0): DATA0

1 (B_0x1): DATA2

2 (B_0x2): DATA1

3 (B_0x3): MDATA
PKTSTS

Packet status

1 (B_0x1): Global OUT NAK (triggers an interrupt)

2 (B_0x2): OUT data packet received

3 (B_0x3): OUT transfer completed (triggers an interrupt)

4 (B_0x4): SETUP transaction completed (triggers an interrupt)

6 (B_0x6): SETUP data packet received
FRMNUM

Frame number
STSPHST

Status phase start

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32