Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text
Description
OTG host configuration register
Fields
| FSLSPCS | 1 (B_0x1_FS_HOST_MODE): PHY clock is running at 48 MHz
2 (B_0x2_LS_HOST_MODE): Select 6 MHz PHY clock frequency
|
| FSLSS | |
Links
(
)