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stm32 /stm32n6 /STM32N645 /RCC /RCC_AHB1ENR

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Interpret as RCC_AHB1ENR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)GPDMA1EN 0 (B_0x0)ADC12EN

ADC12EN=B_0x0, GPDMA1EN=B_0x0

Description

RCC AHB1 enable register

Fields

GPDMA1EN

GPDMA1 enable

0 (B_0x0): GPDMA1 is disabled (default after reset)

1 (B_0x1): GPDMA1 is enabled
ADC12EN

ADC12 enable

0 (B_0x0): ADC12 is disabled (default after reset)

1 (B_0x1): ADC12 is enabled

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32