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stm32 /stm32n6 /STM32N645 /RCC /RCC_APB2ENCR

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Interpret as RCC_APB2ENCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TIM1ENC)TIM1ENC 0 (TIM8ENC)TIM8ENC 0 (USART1ENC)USART1ENC 0 (USART6ENC)USART6ENC 0 (UART9ENC)UART9ENC 0 (USART10ENC)USART10ENC 0 (SPI1ENC)SPI1ENC 0 (SPI4ENC)SPI4ENC 0 (TIM18ENC)TIM18ENC 0 (TIM15ENC)TIM15ENC 0 (TIM16ENC)TIM16ENC 0 (TIM17ENC)TIM17ENC 0 (TIM9ENC)TIM9ENC 0 (SPI5ENC)SPI5ENC 0 (SAI1ENC)SAI1ENC 0 (SAI2ENC)SAI2ENC

Description

RCC APB2 enable register

Fields

TIM1ENC

TIM1 enable
TIM8ENC

TIM8 enable
USART1ENC

USART1 enable
USART6ENC

USART6 enable
UART9ENC

UART9 enable
USART10ENC

USART10 enable
SPI1ENC

SPI1 enable
SPI4ENC

SPI4 enable
TIM18ENC

TIM18 enable
TIM15ENC

TIM15 enable
TIM16ENC

TIM16 enable
TIM17ENC

TIM17 enable
TIM9ENC

TIM9 enable
SPI5ENC

SPI5 enable
SAI1ENC

SAI1 enable
SAI2ENC

SAI2 enable

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32