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stm32 /stm32n6 /STM32N645 /RCC /RCC_APB4HRSTR

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Interpret as RCC_APB4HRSTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)SYSCFGRST 0 (B_0x0)DTSRST 0 (B_0x0)BUSPERFMRST

DTSRST=B_0x0, SYSCFGRST=B_0x0, BUSPERFMRST=B_0x0

Description

RCC APB4H reset register

Fields

SYSCFGRST

SYSCFG reset

0 (B_0x0): SYSCFG is not under reset (default after reset)

1 (B_0x1): SYSCFG is under reset
DTSRST

DTS reset

0 (B_0x0): DTS is not under reset (default after reset)

1 (B_0x1): DTS is under reset
BUSPERFMRST

BUSPERFM reset

0 (B_0x0): BUSPERFM is not under reset (default after reset)

1 (B_0x1): BUSPERFM is under reset

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32