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stm32 /stm32n6 /STM32N645 /RCC /RCC_APB4LLPENSR

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Interpret as RCC_APB4LLPENSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (HDPLPENS)HDPLPENS 0 (LPUART1LPENS)LPUART1LPENS 0 (SPI6LPENS)SPI6LPENS 0 (I2C4LPENS)I2C4LPENS 0 (LPTIM2LPENS)LPTIM2LPENS 0 (LPTIM3LPENS)LPTIM3LPENS 0 (LPTIM4LPENS)LPTIM4LPENS 0 (LPTIM5LPENS)LPTIM5LPENS 0 (VREFBUFLPENS)VREFBUFLPENS 0 (RTCLPENS)RTCLPENS 0 (RTCAPBLPENS)RTCAPBLPENS 0 (R2GRETLPENS)R2GRETLPENS 0 (R2GNPULPENS)R2GNPULPENS 0 (SERFLPENS)SERFLPENS

Description

RCC APB4L Sleep enable register

Fields

HDPLPENS

HDP sleep enable
LPUART1LPENS

LPUART1 sleep enable
SPI6LPENS

SPI6 sleep enable
I2C4LPENS

I2C4 sleep enable
LPTIM2LPENS

LPTIM2 sleep enable
LPTIM3LPENS

LPTIM3 sleep enable
LPTIM4LPENS

LPTIM4 sleep enable
LPTIM5LPENS

LPTIM5 sleep enable
VREFBUFLPENS

VREFBUF sleep enable
RTCLPENS

RTC sleep enable
RTCAPBLPENS

RTCAPB sleep enable
R2GRETLPENS

R2GRET sleep enable
R2GNPULPENS

R2GNPU sleep enable
SERFLPENS

SERF sleep enable

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32