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stm32 /stm32n6 /STM32N645 /RCC /RCC_CCR

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Interpret as RCC_CCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LSIONC)LSIONC 0 (LSEONC)LSEONC 0 (MSIONC)MSIONC 0 (HSIONC)HSIONC 0 (HSEONC)HSEONC 0 (PLL1ONC)PLL1ONC 0 (PLL2ONC)PLL2ONC 0 (PLL3ONC)PLL3ONC 0 (PLL4ONC)PLL4ONC

Description

RCC control Clear register

Fields

LSIONC

LSI oscillator enable in Run/Sleep mode.
LSEONC

LSE oscillator enable in Run/Sleep mode.
MSIONC

MSI oscillator enable in Run/Sleep mode.
HSIONC

HSI oscillator enable in Run/Sleep mode.
HSEONC

HSE oscillator enable in Run/Sleep mode.
PLL1ONC

PLL1 oscillator enable in Run/Sleep mode.
PLL2ONC

PLL2 oscillator enable in Run/Sleep mode.
PLL3ONC

PLL3 oscillator enable in Run/Sleep mode.
PLL4ONC

PLL4 oscillator enable in Run/Sleep mode.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32