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stm32 /stm32n6 /STM32N645 /RCC /RCC_DIVENR

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Interpret as RCC_DIVENR

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https://regviz.com/r/stm32/stm32n6/STM32N645/RCC/RCC_DIVENR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)IC1EN 0 (B_0x0)IC2EN 0 (B_0x0)IC3EN 0 (B_0x0)IC4EN 0 (B_0x0)IC5EN 0 (B_0x0)IC6EN 0 (B_0x0)IC7EN 0 (B_0x0)IC8EN 0 (B_0x0)IC9EN 0 (B_0x0)IC10EN 0 (B_0x0)IC11EN 0 (B_0x0)IC12EN 0 (B_0x0)IC13EN 0 (B_0x0)IC14EN 0 (B_0x0)IC15EN 0 (B_0x0)IC16EN 0 (B_0x0)IC17EN 0 (B_0x0)IC18EN 0 (B_0x0)IC19EN 0 (B_0x0)IC20EN

IC5EN=B_0x0, IC4EN=B_0x0, IC6EN=B_0x0, IC13EN=B_0x0, IC16EN=B_0x0, IC7EN=B_0x0, IC9EN=B_0x0, IC19EN=B_0x0, IC15EN=B_0x0, IC18EN=B_0x0, IC20EN=B_0x0, IC17EN=B_0x0, IC14EN=B_0x0, IC1EN=B_0x0, IC12EN=B_0x0, IC3EN=B_0x0, IC10EN=B_0x0, IC11EN=B_0x0, IC2EN=B_0x0, IC8EN=B_0x0

Description

RCC IC dividers enable register

Fields

IC1EN

IC1 enable

0 (B_0x0): IC1 is disabled (default after reset)

1 (B_0x1): IC1 is enabled
IC2EN

IC2 enable

0 (B_0x0): IC2 is disabled (default after reset)

1 (B_0x1): IC2 is enabled
IC3EN

IC3 enable

0 (B_0x0): IC3 is disabled (default after reset)

1 (B_0x1): IC3 is enabled
IC4EN

IC4 enable

0 (B_0x0): IC4 is disabled (default after reset)

1 (B_0x1): IC4 is enabled
IC5EN

IC5 enable

0 (B_0x0): IC5 is disabled (default after reset)

1 (B_0x1): IC5 is enabled
IC6EN

IC6 enable

0 (B_0x0): IC6 is disabled (default after reset)

1 (B_0x1): IC6 is enabled
IC7EN

IC7 enable

0 (B_0x0): IC7 is disabled (default after reset)

1 (B_0x1): IC7 is enabled
IC8EN

IC8 enable

0 (B_0x0): IC8 is disabled (default after reset)

1 (B_0x1): IC8 is enabled
IC9EN

IC9 enable

0 (B_0x0): IC9 is disabled (default after reset)

1 (B_0x1): IC9 is enabled
IC10EN

IC10 enable

0 (B_0x0): IC10 is disabled (default after reset)

1 (B_0x1): IC10 is enabled
IC11EN

IC11 enable

0 (B_0x0): IC11 is disabled (default after reset)

1 (B_0x1): IC11 is enabled
IC12EN

IC12 enable

0 (B_0x0): IC12 is disabled (default after reset)

1 (B_0x1): IC12 is enabled
IC13EN

IC13 enable

0 (B_0x0): IC13 is disabled (default after reset)

1 (B_0x1): IC13 is enabled
IC14EN

IC14 enable

0 (B_0x0): IC14 is disabled (default after reset)

1 (B_0x1): IC14 is enabled
IC15EN

IC15 enable

0 (B_0x0): IC15 is disabled (default after reset)

1 (B_0x1): IC15 is enabled
IC16EN

IC16 enable

0 (B_0x0): IC16 is disabled (default after reset)

1 (B_0x1): IC16 is enabled
IC17EN

IC17 enable

0 (B_0x0): IC17 is disabled (default after reset)

1 (B_0x1): IC17 is enabled
IC18EN

IC18 enable

0 (B_0x0): IC18 is disabled (default after reset)

1 (B_0x1): IC18 is enabled
IC19EN

IC19 enable

0 (B_0x0): IC19 is disabled (default after reset)

1 (B_0x1): IC19 is enabled
IC20EN

IC20 enable

0 (B_0x0): IC20 is disabled (default after reset)

1 (B_0x1): IC20 is enabled

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32