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stm32 /stm32n6 /STM32N645 /RCC /RCC_MISCLPENCR

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Interpret as RCC_MISCLPENCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DBGLPENC)DBGLPENC 0 (XSPIPHYCOMPLPENC)XSPIPHYCOMPLPENC 0 (PERLPENC)PERLPENC

Description

RCC miscellaneous Sleep enable register

Fields

DBGLPENC

DBG sleep enable
XSPIPHYCOMPLPENC

XSPIPHYCOMP sleep enable
PERLPENC

PER sleep enable

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32