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stm32 /stm32n6 /STM32N645 /RCC /RCC_PLL1CFGR2

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Interpret as RCC_PLL1CFGR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PLL1DIVNFRAC

Description

RCC PLL1 configuration register 2

Fields

PLL1DIVNFRAC

PLL1 Fractional part of the VCO multiplication factor

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32