stm32 /stm32n6 /STM32N645 /RISAF /RISAF_REG12_ACFGR

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Interpret as RISAF_REG12_ACFGR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)SREN 0 (B_0x0)RLOCK 0SRCID0 (B_0x0)SEC 0 (B_0x0)PRIV 0 (B_0x0)RDEN 0 (B_0x0)WREN

SEC=B_0x0, RDEN=B_0x0, PRIV=B_0x0, WREN=B_0x0, SREN=B_0x0, RLOCK=B_0x0

Description

RISAF region 12 subregion A configuration register

Fields

SREN

subregion enable

0 (B_0x0): Subregion z is disabled. Access control of base region x applies to any access between this subregion start and end addresses.

1 (B_0x1): Subregion z of region x is enable. Access control defined in subregion z applies to any access between subregion z start and end addresses.

RLOCK

resource lock

0 (B_0x0): RISAF_REGx_zCFGR, RISAF_REGx_zSTARTR and RISAF_REGx_zENDR are writable.

1 (B_0x1): Writes to RISAF_REGx_zCFGR, RISAF_REGx_zSTARTR and RISAF_REGx_zENDR are ignored.

SRCID

subregion CID

SEC

secure subregion

0 (B_0x0): Only non-secure requests can access subregion z of region x.

1 (B_0x1): Only secure requests can access subregion z of region x.

PRIV

privileged subregion

0 (B_0x0): Privileged and unprivileged accesses are granted in subregion z of region x.

1 (B_0x1): Only privileged accesses are granted in subregion z of region x.

RDEN

read enable

0 (B_0x0): Any read to subregion z of region x returns zero.

1 (B_0x1): Subregion z of region x can be read.

WREN

write enable

0 (B_0x0): Any writes to subregion z of region x are ignored.

1 (B_0x1): Subregion z of region x can be written to.

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