stm32 /stm32n6 /STM32N645 /SYSCFG /SYSCFG_CM55CR

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Interpret as SYSCFG_CM55CR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FPU_IT_EN0 (LOCKSVTAIRCR)LOCKSVTAIRCR 0 (LOCKNSVTOR)LOCKNSVTOR 0 (LOCKSMPU)LOCKSMPU 0 (LOCKNSMPU)LOCKNSMPU 0 (LOCKSAU)LOCKSAU 0 (LOCKDCAIC)LOCKDCAIC

Description

SYSCFG Cortex-M55 control register

Fields

FPU_IT_EN

Enable FPU exception

LOCKSVTAIRCR

Prevent changes to:

LOCKNSVTOR

Prevent changes to the non-secure vector table base address.

LOCKSMPU

Prevent changes to programmed secure MPU memory regions.

LOCKNSMPU

Prevent changes to non-secure MPU memory regions already programmed.

LOCKSAU

Prevent changes to secure SAU memory regions already programmed.

LOCKDCAIC

Disable access to the instruction cache direct cache access registers DCAICLR and DCAICRR.

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