stm32 /stm32n6 /STM32N645 /TAMP /TAMP_SECCFGR

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Interpret as TAMP_SECCFGR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0BKPRWSEC0 (B_0x0)CNT1SEC 0BKPWSEC0 (B_0x0)BHKLOCK 0 (B_0x0)TAMPSEC

TAMPSEC=B_0x0, CNT1SEC=B_0x0, BHKLOCK=B_0x0

Description

TAMP secure configuration register

Fields

BKPRWSEC

Backup registers read/write protection offset

CNT1SEC

Monotonic counter 1 secure protection

0 (B_0x0): Monotonic counter 1 (TAMP_COUNT1R) can be read and written when the APB access is secure or non-secure.

1 (B_0x1): Monotonic counter 1 (TAMP_COUNT1R) can be read and written only when the APB access is secure.

BKPWSEC

Backup registers write protection offset

BHKLOCK

Boot hardware key lock

0 (B_0x0): The Backup registers from TAMP_BKP0R to TAMP_BKP7R can be accessed according to the Protection zone they belong to.

1 (B_0x1): The backup registers from TAMP_BKP0R to TAMP_BKP7R cannot be accessed neither in read nor in write (they are read as 0 and write ignore).

TAMPSEC

Tamper protection (excluding monotonic counters and backup registers)

0 (B_0x0): Tamper configuration and interrupt can be written when the APB access is secure or non-secure.

1 (B_0x1): Tamper configuration and interrupt can be written only when the APB access is secure.

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