stm32 /stm32n6 /STM32N645 /TIM14 /TIM14_SR

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Interpret as TIM14_SR

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)UIF 0 (B_0x0)CC1IF 0 (B_0x0)CC1OF

UIF=B_0x0, CC1IF=B_0x0, CC1OF=B_0x0

Description

TIM14 status register

Fields

UIF

Update interrupt flag

0 (B_0x0): No update occurred.

1 (B_0x1): Update interrupt pending. This bit is set by hardware when the registers are updated:

CC1IF

Capture/compare 1 interrupt flag

0 (B_0x0): No compare match / No input capture occurred

1 (B_0x1): A compare match or an input capture occurred.

CC1OF

Capture/Compare 1 overcapture flag

0 (B_0x0): No overcapture has been detected.

1 (B_0x1): The counter value has been captured in TIMx_CCR1 register while CC1IF flag was already set

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