FFLUSH=B_0x0, ALGODIR=B_0x0, KMOD=B_0x0, GCM_CCMPH=B_0x0, CRYPEN=B_0x0, DATATYPE=B_0x0, KEYSIZE=B_0x0, NPBLB=B_0x0
CRYP control register
ALGODIR | Algorithm direction 0 (B_0x0): Encryption 1 (B_0x1): Decryption |
ALGOMODE | ALGOMODE[2:0]: Algorithm mode 4 (B_0x4): Electronic codebook (ECB) 5 (B_0x5): Cipher Block Chaining (CBC) 6 (B_0x6): Counter mode (CTR) 7 (B_0x7): AES key preparation for ECB or CBC decryption |
DATATYPE | Data type 0 (B_0x0): No swapping (32-bit data). 1 (B_0x1): Half-word swapping (16-bit data). 2 (B_0x2): Byte swapping (8-bit data). 3 (B_0x3): Bit-level swapping. |
KEYSIZE | Key size selection 0 (B_0x0): 128-bits 1 (B_0x1): 192 bits 2 (B_0x2): 256 bits |
FFLUSH | FIFO flush 0 (B_0x0): No effect 1 (B_0x1): FIFO flush enabled |
CRYPEN | CRYP enable 0 (B_0x0): CRYP disabled 1 (B_0x1): CRYP enabled |
GCM_CCMPH | GCM or CCM phase selection 0 (B_0x0): Initialization phase 1 (B_0x1): Header phase 2 (B_0x2): Payload phase 3 (B_0x3): Final phase |
ALGOMODE_1 | ALGOMODE[3] |
NPBLB | Number of padding bytes in last block 0 (B_0x0): All bytes are valid (no padding) 1 (B_0x1): Padding for the last LSB byte 15 (B_0xF): Padding for the 15 LSB bytes of last block. |
KMOD | Key mode selection 0 (B_0x0): Normal-key mode. Key registers are freely usable. 2 (B_0x2): Shared-key mode. If shared-key mode is properly initialized in SAES peripheral, the CRYP peripheral automatically loads its key registers with the data stored in the SAES key registers. The key value is available in CRYP key registers when BUSY bit is cleared and KEYVALID is set in the CRYP_SR register. Key error flag KERF is set otherwise in the CRYP_SR register. |
IPRST | CRYP peripheral software reset |