stm32 /stm32n6 /STM32N655 /MCE1 /MCE_CR

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Interpret as MCE_CR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)GLOCK 0 (B_0x0)MKLOCK 0 (B_0x0)CIPHERSEL

CIPHERSEL=B_0x0, MKLOCK=B_0x0, GLOCK=B_0x0

Description

MCE configuration register

Fields

GLOCK

Global lock

0 (B_0x0): MCE registers are writable

1 (B_0x1): All writes to MCE registers are ignored, with the exception of MCE_IACR and MCE_IAIER registers.

MKLOCK

Master keys lock

0 (B_0x0): Writes to MCE_MKEYRx and MCE_FMKEYRx registers are allowed

1 (B_0x1): Writes to MCE_MKEYRx and MCE_FMKEYRx registers are ignored until next MCE reset.

CIPHERSEL

Cipher selection

0 (B_0x0): No cipher is selected. Any read (resp. write) to an encrypted region with BREN=1 returns zero (resp. is ignored), and illegal access flag IAEF bit is set.

1 (B_0x1): AES-128 cipher selected for all encrypted regions

2 (B_0x2): Noekeon cipher selected for all encrypted regions

3 (B_0x3): AES-256 cipher selected for all encrypted regions

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