RCC_IOPENR

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Interpret as RCC_IOPENR

GPIOFEN=B_0x0, GPIOBEN=B_0x0, GPIOEEN=B_0x0, GPIOCEN=B_0x0, GPIODEN=B_0x0, GPIOAEN=B_0x0

I/O port clock enable register

GPIOAEN	I/O port A clock enable This bit is set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
GPIOBEN	I/O port B clock enable This bit is set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
GPIOCEN	I/O port C clock enable This bit is set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
GPIODEN	I/O port D clock enable This bit is set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
GPIOEEN	I/O port E clock enable⁽¹⁾ This bit is set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable
GPIOFEN	I/O port F clock enable This bit is set and cleared by software. 0 (B_0x0): Disable 1 (B_0x1): Enable

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