ADC common status register
| ADRDY_MST | Master ADC ready This bit is a copy of the ADRDY bit in the corresponding ADC_ISR register. |
| EOSMP_MST | End of Sampling phase flag of the master ADC This bit is a copy of the EOSMP bit in the corresponding ADC_ISR register. |
| EOC_MST | End of regular conversion of the master ADC This bit is a copy of the EOC bit in the corresponding ADC_ISR register. |
| EOS_MST | End of regular sequence flag of the master ADC This bit is a copy of the EOS bit in the corresponding ADC_ISR register. |
| OVR_MST | Overrun flag of the master ADC This bit is a copy of the OVR bit in the corresponding ADC_ISR register. |
| JEOC_MST | End of injected conversion flag of the master ADC This bit is a copy of the JEOC bit in the corresponding ADC_ISR register. |
| JEOS_MST | End of injected sequence flag of the master ADC This bit is a copy of the JEOS bit in the corresponding ADC_ISR register. |
| AWD1_MST | Analog watchdog 1 flag of the master ADC This bit is a copy of the AWD1 bit in the corresponding ADC_ISR register. |
| AWD2_MST | Analog watchdog 2 flag of the master ADC This bit is a copy of the AWD2 bit in the corresponding ADC_ISR register. |
| AWD3_MST | Analog watchdog 3 flag of the master ADC This bit is a copy of the AWD3 bit in the corresponding ADC_ISR register. |
| LDORDY_MST | ADC voltage regulator ready flag of the master ADC This bit is a copy of the LDORDY bit of the corresponding ADC_ISR register. |
| ADRDY_SLV | Slave ADC ready This bit is a copy of the ADRDY bit in the corresponding ADCx+1_ISR register. |
| EOSMP_SLV | End of Sampling phase flag of the slave ADC This bit is a copy of the EOSMP2 bit in the corresponding ADCx+1_ISR register. |
| EOC_SLV | End of regular conversion of the slave ADC This bit is a copy of the EOC bit in the corresponding ADCx+1_ISR register. |
| EOS_SLV | End of regular sequence flag of the slave ADC This bit is a copy of the EOS bit in the corresponding ADCx+1_ISR register. |
| OVR_SLV | Overrun flag of the slave ADC This bit is a copy of the OVR bit in the corresponding ADCx+1_ISR register. |
| JEOC_SLV | End of injected conversion flag of the slave ADC This bit is a copy of the JEOC bit in the corresponding ADCx+1_ISR register. |
| JEOS_SLV | End of injected sequence flag of the slave ADC This bit is a copy of the JEOS bit in the corresponding ADCx+1_ISR register. |
| AWD1_SLV | Analog watchdog 1 flag of the slave ADC This bit is a copy of the AWD1 bit in the corresponding ADCx+1_ISR register. |
| AWD2_SLV | Analog watchdog 2 flag of the slave ADC This bit is a copy of the AWD2 bit in the corresponding ADCx+1_ISR register. |
| AWD3_SLV | Analog watchdog 3 flag of the slave ADC This bit is a copy of the AWD3 bit in the corresponding ADCx+1_ISR register. |
| LDORDY_SLV | ADC voltage regulator ready flag of the slave ADC This bit is a copy of the LDORDY bit of the corresponding ADCx+1_ISR register. |